Computer Organization with Machine Level Programming
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Computer Organization
with Machine Level Programming
Memory subsystem organization and interfacing
The electronic industry has put a significant effort into manufacturing memory subsystems capable of keeping up with the low access time required by modern processors and the high capacity required by todays applications.
Memory Subsystem
Before proceeding with the explanation of current memory subsystems, it is important to introduce a glossary of the most commonly used terms:
RAM (Random Access Memory)
SRAM (Static RAM)
DRAM (Dynamic RAM)
SDRAM (Synchronous DRAM)
Random Access Memory (RAM) is what most of us think of when we hear the word memory associated with computers. It is volatile memory, meaning all data is lost when power is turned off. The RAM is used for temporary storage of program data, allowing performance to be optimum.
SRAMs (Static RAMs) are generally very fast, but smaller capacity (few megabytes) than DRAM (see next section), and they have a chip structure that maintains the information as long as power is maintained. They are not large enough to be used for the main memory of a server.
DRAMs (Dynamic RAMs) are the only choice for servers. The term “dynamic” indicates that the information is stored on capacitors within an integrated circuit. Since capacitors discharge over time, due to leakage currents, the capacitors need to be recharged (“refreshed”) periodically to avoid data loss. The memory controller is normally in charge of the refresh operations.
SDRAMs (Synchronous DRAMs) are the most commonly used DRAM. SDRAMs have a synchronous interface, meaning that their operation is synchronized with a clock signal. The clock is used to drive an internal finite state machine that pipelines memory accesses. Pipelining means that the chip can accept a new memory access before it has finished processing the previous one. This greatly improves the performance of SDRAMs compared to classical DRAMs.
Read Only Memory
This is read-only memory, memory that can only be read, but cannot be written to. ROM is used in situations where the data must be held permanently. This is due to the fact that it is non-volatile memory. This means the data is “hard-wired” into the ROM chip. You can store the chip forever and the data will always be there. Besides, the data is very secure. The BIOS is stored on ROM because the user cannot disrupt the information.
Electrically Erasable Programmable ROM (EEPROM). Also called flash BIOS. This ROM can be rewritten through the use of a special software program. Flash BIOS operates this way, allowing users to upgrade their BIOS.
ROM is slower than RAM, which is why some try to shadow it to increase speed.
Programmable ROM(PROM). This is basically a blank ROM chip that can be written to, but only once. It is much like a CD-R drive that burns the data into the CD. Some companies use special machinery to write PROMs for special purposes.
Erasable Programmable ROM (EPROM). This is just like PROM, except that you can erase the ROM by shining a special ultra-violet light into a sensor atop the ROM chip for a certain amount of time. Doing this wipes the data out, allowing it to be rewritten.
Electrically Erasable Programmable ROM (EEPROM). Also called flash BIOS. This ROM can be rewritten through the use of a special software program. Flash BIOS operates this way, allowing users to upgrade their BIOS.
DIMMs Multiple memory chips need to be assembled together to build a memory subsystem. They are organized in small boards known as DIMMs (Dual Inline Memory Modules).Figure 1 shows the classical organization of a memory subsystem [24]. For example, a memory controller connects four DIMMs each composed of multiple DRAM chips. The memory controller (that may also integrate the clock driver) has an address bus, a data bus, and a command (aka control) bus. It is in charge of reading, writing, and refreshing the information stored in the DIMMs
INTERRUPT 10H
(VIDEO REFERENCE)
Int 10h (Video Reference)
This corresponds to the BIOS interrupt call for video services. Such services include setting the video mode, character and string output, and graphics primitives (reading and writing pixels in graphics mode).
To use this call, load AH with the subfunction you want to use, load other parameters in the other registers, and make the call. Registers not used by the function as inputs or outputs are not affected.
Note: The text functions work in all modes, including graphics modes.
Function 00h: Set Video Mode
Sets the video mode. This function will clear the screen unless bit 7 of the AL register is set.
Inputs
AH = 00h
AL = Video Mode. See another interrupt reference for full details of all modes supported.
01h: 40×25 Text, 16 colors, 8 pages
03h: 80×25 Text, 16 colors, 8 pages
13h: 320×200 Graphics, 256 colors, 1 page
Outputs
Function 01h: Define Cursor Appearance
Sets the starting and ending lines of the screen cursor, and can also be used to make the cursor invisible. In some modes, the characters are not exactly 8 lines high in these cases the graphics hardware will adapt the input values to the current character size.
Inputs
AH = 01h
CH = Starting line of cursor. Add 20h to make the cursor invisible.
CL = Ending line of cursor.
Outputs