Architecture of Fpgas and Cplds: A Tutorial
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Architecture of FPGAs and CPLDs: A Tutorial
Abstract
This paper provides a tutorial survey of architectures of commercially available high-capacity
field-programmable devices (FPDs). We first define the relevant terminology in the field and then
describe the recent evolution of FPDs. The three main categories of FPDs are delineated: Simple
PLDs (SPLDs), Complex PLDs (CPLDs) and Field-Programmable Gate Arrays (FPGAs). We
then give details of the architectures of all of the most important commercially available chips,
and give examples of applications of each type of device.
1 Introduction to High-Capacity FPDs
Prompted by the development of new types of sophisticated field-programmable devices (FPDs),
the process of designing digital hardware has changed dramatically over the past few years.
Unlike previous generations of technology, in which board-level designs included large numbers
of SSI chips containing basic gates, virtually every digital design produced today consists mostly
of high-density devices. This applies not only to custom devices like processors and memory, but
also for logic circuits such as state machine controllers, counters, registers, and decoders. When
such circuits are destined for high-volume systems they have been integrated into high-density
gate arrays. However, gate array NRE costs often are too expensive and gate arrays take too long
to manufacture to be viable for prototyping or other low-volume scenarios. For these reasons,
most prototypes, and also many production designs are now built using FPDs. The most compelling
advantages of FPDs are instant manufacturing turnaround, low start-up costs, low financial
risk and (since programming is done by the end user) ease of design changes.
The market for FPDs has grown dramatically over the past decade to the point where there is
now a wide assortment of devices to choose from. A designer today faces a daunting task to
research the different types of chips, understand what they can best be used for, choose a particular
manufacturerss product, learn the intricacies of vendor-specific software and then design the
hardware. Confusion for designers is exacerbated by not only the sheer number of FPDs available,
but also by the complexity of the more sophisticated devices. The purpose of this paper is to
provide an overview of the architecture of the various types of FPDs. The emphasis is on devices
with relatively high logic capacity; all of the most important commercial products are discussed.
Before proceeding, we provide definitions of the terminology in this field. This is necessary
because the technical jargon has become somewhat inconsistent over the past few years as companies
have attempted to compare and contrast their products in literature.
1.1 Definitions of Relevant Terminology
The most important terminology used in this paper is defined below.
* Field-Programmable Device (FPD) — a general term that refers to any type of integrated circuit
used for implementing digital hardware, where the chip can be configured by the end user
to realize different designs. Programming of such a device often involves placing the chip into
a special programming unit, but some chips can also be configured “in-system”. Another name
for FPDs is programmable logic devices (PLDs); although PLDs encompass the same types of
chips as FPDs, we prefer the term FPD because historically the word PLD has referred to relatively
simple types of devices.
* PLA — a Programmable Logic Array (PLA) is a relatively small FPD that contains two levels
of logic, an AND-plane and an OR-plane, where both levels are programmable (note: although
PLA structures are sometimes embedded into full-custom chips, we refer here only to those
PLAs that are provided as separate integrated circuits and are user-programmable).
* PAL* — a Programmable Array Logic (PAL) is a relatively small FPD that has a programmable
AND-plane followed by a fixed OR-plane
* SPLD — refers to any type of Simple PLD, usually either a PLA or PAL
* CPLD — a more Complex PLD that consists of an arrangement of multiple SPLD-like blocks
on a single chip. Alternative names (that will not be used in this paper) sometimes adopted for
this style of chip are Enhanced PLD (EPLD), Super PAL, Mega PAL, and others.
* FPGA — a Field-Programmable Gate Array is an FPD featuring a general structure that allows
very high logic capacity. Whereas CPLDs feature logic resources with a wide number of inputs
(AND planes), FPGAs offer more narrow logic resources. FPGAs also offer a higher ratio of
flip-flops to logic resources than do CPLDs.
* HCPLDs — high-capacity PLDs: a single acronym that refers to both CPLDs and FPGAs. This
term has been coined in trade literature for providing an easy way to refer to both types of
devices. We do not use
Essay About Logic Circuits And Field-Programmable Gate Arrays
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